MULTI-BASE - Goals and objectives

Goals and objectives

The collaborative research work in the MULTI-BASE project is aimed at:

Objective 1:

Drive the development in the Digital BaseBand (DBB) domain and focus on the requirements and feasibility of two main concurrent communication modes (multi-tasking radio):

Create a European leading edge solution for multi-standard communication on multi-core processors and

Provide HW accelerated multi-standard communication on a single core processor.

Objective 2:

Identify an architecture that enables a reconfigurable transceiver baseband processing chain with shared building blocks for simultaneous multistandard communication:

Provide throughput up to 100Mbps in mobile cellular scenarios and up to 1Gbps in stationary connectivity scenarios, under the constraints of power, cost and area required by commercial terminal units.

Creating a modular platform so that it enables long-term scalable use. This requires a unified interface, a scalable interconnection subsystem and interface protocols, heterogeneous modules, and selection of efficient programming tools for stream signal processing.

Objective 3:

Demonstrate the design for a proof of concept of a reconfigurable DBB platform capable of:

Executing emerging air interfaces such as 3GPP LTE and IEEE 802.11g/n;

Executing at least two air interfaces in parallel when satisfying the real time constraints of both;

Objective 4:

Implement key building blocks of the mentioned platform to prove the energy-efficiency and implementation cost breakthroughs;

Proof-of-concept on silicon,

Objective 5:

Solve key issues and overcome barriers to the widespread commercial use of reconfigurable digital baseband implementations in mobile terminals.

Provide spectrum efficient end-to-end connectivity.

Harvest mass-production technology to allow the said platform to meet the best trade-off between efficiency and flexibility for all radio baseband applications.

Capitalise the heterogeneous Multi processor System-on-Chip (MPSOC) concept and the performancecomplexity scalable design paradigm.

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